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基于verilog的鉴相器设计，鉴相器是锁相环的一部分，功能是检测两个时钟是否同步-The phase detector based on verilog design, PLL phase detector is part of function is to test whether the two clock synchronization
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在数据采集系统中，锁相环是一种非常有用的同步技术，因为通过锁相环，可以使得不同的数据采集板卡共享同一个采样时钟。-In the data acquisition system, the phase-locked loop is a very useful synchronization technology, because the adoption of phase-locked loop, you can make the different data acquisition boards
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Abstract-In this paper, simple autonomous chaotic circuits
coupled by resistors are investigated. By carrying out computer
calculations and circuit experiments, irregular self-switching phenomenon
of three spatial patterns characterized by the
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介绍了在数字语音通信中, 利用在系统可编程技术和复杂可编程逻辑器件CPLD, 实现了数字语音的复接和分接
对于其中的单稳态电路的数字化和数字锁相环提取位同步信号也进行了详细的设计说明。实际应用结果表明, 系统工作稳
定可靠, 设计是成功的。-Describes the digital voice communications, the use of in-system programmable technical and complex programmable logic devic
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资料的内容是实现旋转机械同步整周期采样的数据采集系统相关文献资料，包括鉴相信号如何倍频，机械振动信号相位如何检测等的实现方法。-Information content is for rotating mechanical synchronization synchronous sampling data acquisition system-related documents, including the Kam-believe number to harmonic mechanical vib
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一种基于相位差分的GPS比特同步方法,很详细的讲解了GPS在相位差分中的应用。-Based on phase difference of the GPS bit synchronization, a very detailed explanation of the GPS application in the phase difference.
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数字电视接收机载波相位同步算法研究
数字电视接收机载波相位同步算法研究-Digital TV receiver carrier phase synchronization algorithm for digital TV receiver carrier phase synchronization algorithm
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在电网电压频率波动或者三相不平衡的情况下,硬件锁相很难准确检测到基波正序的相位。在结合PWM整流器空间矢量解耦控制算法的基础上,将软件锁相环技术应用在PWM整流器控制系统中,并用仿真和实验验证了该方案的可行性。实验结果表明,该方案解决了电网电压频率波动及三相不平衡时的相位同步等问题,并在工程上具有一定参考价值。-Frequency or voltage fluctuations in three-phase unbalanced case, the hardware lock is diffic
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Phase synchronization in coupled nonlinear oscillators
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频率同步是宽带OFDM系统中的关键技术，IEEE 802.11a 采用OFDM技术，利用其前导序列的重复结构，提出了一种分步的粗细频偏捕获与校正算法，同时为了补偿时域同步后的残余相差和适应信道的时变特性，还提出了一种基于频域导频的相位跟踪方案-Frequency synchronization is a key technology in the broadband OFDM systems, IEEE 802.11a uses OFDM technology, the use of the r
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针对此,笔者详细介绍了16QAM差分
调制解调的原理,并通过接收端解码电路相应的运算规则消除了频偏和相偏的影响,免除了复杂的
载波和相位同步,降低了QAM接收机的复杂度。-For this, the author describes the detail of the principle of 16QAM differential modulation and demodulation, and by eliminating the frequency deviation and pha
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用matlab仿真锁相环 来实现载波同步，调频等功能-Use Matlab simulation phase-locked loop to achieve carrier synchronization, FM
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This model shows the implementation of a QPSK transmitter and receiver. The receiver addresses practical issues in wireless communications, e.g. carrier frequency and phase offset, timing offset and frame synchronization. The receiver demodulates the
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Code for synchronization research. You can make synchrogram from two phase data.
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a new circuit topology of a
phase-locked loop that can be used for synchronising a singlephase
wind turbine generator (WTG) with the low voltage utility
grid. The circuit is based on the time-delay digital tanlock loop
(TDTL) architecture and
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This paper presents a generalized nonlinear (Markov)
analysis technique for evaluation of the statistical
performance of uniformly sampled digital phase-locked
loops (DPLL). Recently proposed synchronization
algorithms use more discrete t
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In a series of papers in recent years new
structures for coherent M-PSK (M-ary Phase Shift Keying)
receivers were suggested. These include structures for carrier
phase detectors for the carrier PLL (Phase Lock Loop),
carrier PLL lock dete
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一种全数字时钟数据恢复电路的设计与实现，提出一种改进型超前滞后锁相环法的全数字时钟恢复算法，与同类电路比较，具有数据码率捕获范围宽、捕获时间短的优点。-Clock Date Recovery(CDR)circuit is a important part of data transmission equipment．For the
burst data transmission，the traditional phase—lock loop can hardly achieve the re
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It is possible to confirm whether error of Automatic Phase Synchronization excess the setting
value of parameter No.13437-No.13440 (Threshold for Automatic Phase Synchronization error
detection signal) by this signal.
The signals turn to 1 in t
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充分地利用了DSP强大的信号处理能力和现代数值分析方法。 设计了电能表前端采样及计量模块的硬件，以及一套符合国标GB/T 17883-1999的 0.2S
级精度要求的算法，同时扩展了谐波分析功能。系统概述为：三相电压、电流
AD 采样，采样数据通过串口送至处理器(DSP)，由 DSP 对采样数据作电参数计
量和谐波分析，处理结果通过定制 LCD 显示，并通过脉冲口发出有功、无功校
表脉冲。DSP 采用 ADI 公司的 BLACKFIN531-16 位定点芯片，最高处理能力可
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